Resistive bridge fault modeling, simulation and test generation
نویسندگان
چکیده
Resistive bridging faults in combinational CMOS circuits are studied in this work. Circuit-level models are abstracted to voltage behavior for use in voltage-level fault simulation and test generation. Fault simulation is done using different test sets in order to study their effectiveness. Test generation is done to detect the highest possible bridging resistance for each fault. Different test sets, power supply voltages, and fault models are studied on the ISCAS85 benchmark circuits.
منابع مشابه
Resistive Bridge Fault Modeling, Simulation and Test Generation - Test Conference, 1999. Proceedings. International
In this work' we develop models of resistive bridging faults and study the fault coverage on ISCAS85 circuits of different test sets using resistive and zero-ohm bridges at different supply voltages. These results explain several previously observed anomalous behaviors. In order to serve as a reference, we have developed the $rst resistive bridging faylt ATPG, which attempts to detect the maxim...
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تاریخ انتشار 1999